pulse width modulator on LPC2378
Discussion in "ARM Development" started by bonois_dailleurs Sep 5, 2010.
Fri Sep 10 2010, 05:26 pm
thank you , the problem was a wrong value on pinsel3 , i also didn't reset the PWM1 counter !!!!(PWM1TCR = 0x2 )
Fri Sep 10 2010, 07:13 pm
other thing ,
here are words used in the user manuel i didn't understand something
they said : to provide a single edge controlled signal we need 2 match registers ,
1 register to control the cycle rate (i guess it's PWM1MR0) and another one to control the edge position
on the other side for every pwm1 output , we will call it PWM1.x , it's set with PWM1MR0
and reset by PWM1MRx
now to make a picture on how it automatically function can we say : ???
the signal begins high when an interrupt occurs (PWM1MR0 matches the PWM1TC)
so signal moves to low state it means we have a falling edge
and after we will put an edge on every PWM1MRx time
it's a little philosophic , but don't blame on me my friend i like to go deep into things and somehow it'll help me to understand double edge controlled signals
thank you in advance
here are words used in the user manuel i didn't understand something
they said : to provide a single edge controlled signal we need 2 match registers ,
1 register to control the cycle rate (i guess it's PWM1MR0) and another one to control the edge position
on the other side for every pwm1 output , we will call it PWM1.x , it's set with PWM1MR0
and reset by PWM1MRx
now to make a picture on how it automatically function can we say : ???
the signal begins high when an interrupt occurs (PWM1MR0 matches the PWM1TC)
so signal moves to low state it means we have a falling edge
and after we will put an edge on every PWM1MRx time
it's a little philosophic , but don't blame on me my friend i like to go deep into things and somehow it'll help me to understand double edge controlled signals
thank you in advance
Sat Sep 11 2010, 05:53 pm
you are just misunderstood by the concept of interrupt.
in hardware PWM, interrupts are optional i.e. if you want to get notified when the state of your pin changes you can enable that interrupt. otherwise your hardware module does the pin toggling automatically on every match, without interrupting the processor.
now in single edge PWM, you have one period register which is MR0 and duty cycle registers, MR1, MR2, MR3... MR0 always sets your o/p pin and MRx always resets your PWM o/p. so this case you have only one edge that can be controlled. if you try changing the cycle all the PWM o/p get effected.
in double edge PWM case is the other way, you have 2 registers for an individual PWM and are always in pair. i.e. you can have MR0 and MR1, MR2 and MR3.. so actual PWM channels or say effective number of PWM channels get reduced by half.
Its good to know things in deep if you read manual carefully you will understand everything. Language used is not simple but its very technical, assuming person has basic knowledge of all the phenomenon
in hardware PWM, interrupts are optional i.e. if you want to get notified when the state of your pin changes you can enable that interrupt. otherwise your hardware module does the pin toggling automatically on every match, without interrupting the processor.
now in single edge PWM, you have one period register which is MR0 and duty cycle registers, MR1, MR2, MR3... MR0 always sets your o/p pin and MRx always resets your PWM o/p. so this case you have only one edge that can be controlled. if you try changing the cycle all the PWM o/p get effected.
in double edge PWM case is the other way, you have 2 registers for an individual PWM and are always in pair. i.e. you can have MR0 and MR1, MR2 and MR3.. so actual PWM channels or say effective number of PWM channels get reduced by half.
Its good to know things in deep if you read manual carefully you will understand everything. Language used is not simple but its very technical, assuming person has basic knowledge of all the phenomenon
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